Switching Time Delay Optimization for “SiC+Si” Hybrid Device in a Phase-Leg Configuration

Compared to SiC MOSFET, the switching loss of Si IGBT is much higher due its slow speed and tail current. IGBT/SiC MOSFET hybrid switch device can reach optimal performance with low static dynamic loss, which improve current capacity devices reduce power based converters. With separated gate control signals, moments two be controlled independently ensure under zero-voltage (ZVS) conditions. This measurement tends IGBT. However, time delay between these has significant impacts on loss. In this paper, optimization method proposed minimize switch. The characteristics hybrid-paralleled are studied, a generalized model for developed. influence analyzed verified through double pulse tests in phase-leg configuration. experimental results show that turn-on turn at same reduced by about 73% compared solely 52% MOSFET. While turn-off sequence turns off ahead Under switch, 61.4%. strategy used Buck converter verify superiority SiC/Si sequence. Simulation consistent theoretical analysis, efficiency improved 2.5% using